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TD-ScanPro™

Vector translation tool of choice by NI Customers
TD-ScanPro is a result of the collaboration between TSSI and Emerson/NI to enable test engineers to import standard EDA formats such as WGL, STIL, VCD, and EVCD to the latest NI STS digital pattern format (.digipat, .digitiming, .digilevel, and specs).
Features and Benefits:
  • Suports both the new PXIe 6570/1 patterns, and the older PXIe 654x/655x/656x waveforms
  • A single pattern conversion job can be done on a laptop, or a batch of hundreds of patterns can be submitted to a server farm 

  • Flow-based self-documented graphical programming is similar to LabVIEW usage, yet can also be executed in a command line batch process

  • A comprehensive utility library for data management, conditioning, and viewing to fit any functional and scan patterns to the NI STS platform

  • Low cost perpetual licensing model for the Windows OS

  • Download, install, and start generating NI patterns in minutes

  • Purchase online 24/7

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What's New in v2024.1

  • Zipping through millions of pattern labels in source STIL files

  • Advanced waveform comparison display for instant verification of different purposes.  Differences will be highlighted by a red bar spanning the mismatched waveform for visual inspection, or in a text report for analysis.  Some common purposes are:

    • Pre- and post-conversion verification​

    • Core to Chip level integration (even with different pin names)

    • Debugging of a specific region

  • Processing many many STIL/WGL files?  The new Incremental Mode provides a way for users to process and convert multiple pattern files ​as a group which uses the same pin and timing characteristics across the entire set.  This is ideal for testing a group of patterns of the same timing specification while yet they weren't sent at once from the design team.  Patterns can be processed as they come without having to re-run all previous patterns.  This is the Incremental Mode's advantage in preserving incremental data to intelligently re-use common timing seen in previous runs.

  • Turbo charged cyclization engines.  Processing large VCD/EVCD files is much faster with Verilog-InConverter and Cyclizer Conditioner combo to perform multi-threaded parallel processing

  • STIL Support. Added support for the 1450.1 Variables block and IntegerConstants syntax.

  • STIL output by Siemens Tessent with "async_clock" will be processed into separate time domain.

  • NI-STS has new option to add more flexiblity in timing equations: PassThru, AddEqns, or Times.

  • NI-STS has been updated with a new set of hardware constraints:

    • Minimum period = 10.0ns​

    • Minimum time between any driven data change = 3.75ns

    • Minimum time between any Drive On and Drive Off edges = 5.0ns

    • Minimum time between Compare Strobes = 5.0ns

  • Much much more.  Download your latest v2024.1 TD-ScanPro today!

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