Powerful Software Tools and Methods to Accelerate Test Program Development


Test costs have now risen to as much as 50 percent of the total manufacturing cost for many of today’s most advanced ICs and system-on-chip (SoC) devices. A major component of total test cost is the time and resources required for test program development. While test development tools currently exist for translating a device’s functional events and scan patterns into test programs for target ATE, today’s growing device complexity and new manufacturing requirements have presented new challenges. For example, identification and specification of critical timing parameters that require conversion into cycle-based ATE formats have become an increasing cost factor. This can also significantly impact test accuracy. Only a few years ago, timing specifications from microprocessor and IP cores, multiple bus types, and other device components could often be established through published timing specifications and by a manageable, iterative process between design and test engineering. Automatic test pattern generation (ATPG) tools in the structural testing arena deal with simple timing, and hence, are able to generate cycle-based timing, but today’s complex SoCs may consist of hundreds of IP cores, while scan chains, scan depth, and scan compression technologies have dramatically increased. In addition, as device performance grew, the timing impact from logic simulators increasingly needed to be factored into test program translation. Further complicating test program development is the need for compatibility with multiple ATE platforms to accommodate global manufacturing strategies.

Next-generation design-to-test tools have to address these and other factors to help reduce the growing cost-of-test. Tools must support standard industry test languages, support both functional events and scan patterns, as well as validate outputs across multiple ATE platforms. Automating the timing discovery process and correction for simulation biases are also required. This paper will provide an overview of the state of automated test program generation and discuss the latest tools and techniques that are available to help speed complex devices to market. The paper will also identify the current areas where continued work is required.

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