TSSI Unveils New Design and Test Collaboration Tool at DAC 2008

Design Automation Conference, Anaheim, CA, June 09, 2008 – Test Systems Strategies Incorporated (TSSI) today announced the first of its kind design and test collaboration tool, TSSI FailMap™.

To enable design teams with a fast and accurate way to inspect silicon failures from the tester, TSSI FailMap correlates tester's failure datalog information with the designer's original Verilog Change Dump (VCD), the popular simulation output format.

The output of TSSI FailMap contains failure markers for rapidly locating failures.  At each failing location, FailMap provides a composite view of the original VCD waveform and the "actual" waveform seen on the tester on a per-cycle basis.

Each failing cycle can be masked, or "learned" so FailMap can produce the new VCD which reflects the exact behavior seen on the physical tester.

"During silicon bring-up period, time pressure is tremendous.  Design and test teams must pull out all stops to meet deadlines.  Countless heroic problem solvings and ingenious skill sets are frequently applied but seldom productized to benefit future projects, or at the least, for repeatability."  Said Hau Lam, President and CEO at TSSI.  "FailMap is one of those techniques productized to automate this one area of collaboration between design and test teams.  Test engineers no longer need to perform tedious screenshot captures for communicating failing waveforms to design, and design has means to conduct what-if analysis on the ATE datalog without having to interpret the different textual syntax."

TSSI FailMap is shipping now.  For more information, contact: