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TSSI Unveals Next-Generation Virtual Test Solution at DAC 2007

TSSI Showcases Next Generation Virtual Test Product, TSSI VirtualTester (TVT™), Designed for Mixed-Signal Extension

When the "silicon week" stretches to weeks or months, and the failing test program is holding up product release, test teams need debug tools that can, in a very short order, help isolate root-cause. And the potential root causes often are

  • Test pattern flaws
  • Test programming errors
  • Loadboard defects
  • Fabrication defects
  • Tester hardware/software errors (or mis-understood features)
  • And there's always a chance of a design flaw

 

For years, TSSI's pioneering Digital VirtualTester (DVT™) has helped many test teams shorten their silicon bring-up time from months to days with two time-saving capabilities:

1. The ability to perform pre-silicon simulation of the test program on a model of the target tester, and
2. The ability to debug and isolate the root cause (as mentioned above) with or without the physical DUT and the tester.

Although only in the digital domain of the test programs, the savings have been significant enough that many customers integrated DVT into their tapeout check list.

Now, with the next generation Virtual Test Product, TSSI VirtualTester (TVT™), TSSI is advocating that the best way to save weeks and months is to prevent the problems from being introduced in the first place.

TVT enables the designer to perform their simulation with the tester model taken into consideration; thereby, ensuring all test-related issues are addressed upfront, which is the most cost effective way.

Generic VirtualTester

Currently, most TSSI's DVT customers target at an ATE model such as Teradyne J750, Verigy 93000, Advantest T6682, or LTX Fusion (to name only a few). After some years of observation, we've learned that 80% of the benefits are realized in the validation of a generic ATE where transformation from event-based simulation outputs to cycled-based vectors should be the first to be verified or subsequent issues become less relevant. TVT provides the core of its product to be not only tester neutral, but also based on industry standard format, the IEEE 1450 STIL (Standard Test Interface Language). 

Layer Architecture

Furthermore, to serve all virtual test applications in the most cost effective way, TSSI Virtual Test product line is architected in layers of functionalities. For example, a DFT layer can be added for applications with design-for-test emphasis (BIST, Scan Compression, At-speed Scan, etc). For memory test applications, a TVT Memory layer can be added. For ATE-specific validations, a layer of Teradyne UltraFlex, Verigy 93000, Advantest T2000, Nextest Maverick, etc, can be plugged in. For retargeting from one ATE-platform to another, a Retargeting layer can be added on. Finally, with this architecture, customer-specific tester model, and especially, mixed-signal applications, can be extended in a modular fashion.