Interactivity Meets Powerful New Waveform Analysis
Now design-to-test engineers can reduce test program development time and improve reliability with TestDeveloper’s easy-to-use graphical environment. Advanced waveform analysis and debugging capabilities save time by revealing potential tester compatibility problems early in the process.
New Automated Timing Analysis
TestDeveloper electronic design automation software efficiently analyzes timing from IC design simulation and generates high-quality, ATE-ready test files, reduces test time, and lowers costs for complex SoC devices. TestDeveloper features: - Seamless integration with popular simulators and ATPG tools and top tester models
- Simple data transfer between testers and programs for re-simulation and fault-simulation
- Standard language support including, WGL, STIL, Verilog, and VHDL
- Manipulation and processing of large test programs
- Timing verification makes corrections before tester-ready program templates are created
Windows-based Wizardry Interface for Design and Test Environments
As part of the industry’s most popular design-to-test tool family, TestDeveloper is qualified for use by top electronic design automation (EDA) suppliers. TestDeveloper capabilities enable a successful bridge from the design to production environment through a series of powerful TesterBridges that map the cyclized data to a number of tester families.
Supported Automatic Test Equipment (ATE): - Advantest T33xx, T66xx, T65xx
- LTX-Credence Sapphires, Quartet/Duo/Vista, SC, Kalos, NPTest Schlumberger ITS9000, IMS Vanguard/ATS, SZ Systems
- Teradyne J750/Flex/UltraFlex, J971/3, Catalyst/Tiger
- Verigy (Agilent) V93000, HP83000
TestDeveloper’s easy-to-use interface allows for rapid adoption and immediately increases productivity. It’s the right solution for fabless customers: - PC-based architecture is self-contained
- Offers test engineers portability
- Flexible licensing and leasing model meet unique test requirements
TestDeveloper simplifies functional pattern conversion process to 4 simple step: - Import. Read VCD, EVCD, WGL, or STIL.
- Waveform Analyze. Automatically detect clock cycles or apply user-specified cycle to gather all waveforms found in the source VCD/EVCD. Note that this is waveform-based, which provides the most accuracy cyclization (as opposed to sample technique commonly used where design intents are compromised). If source files are WGL or STIL, this step can be skipped.
- Cyclizer. Simply binding pattern bits to the waveforms/timing extracted in the previous step. Again, if source files are WGL or STIL, this step can be skipped.
- TesterBridge. This last step applies tester rules checks, tester specific resource allocation, and tester files generation.
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